A multilayered printed circuit board so-called a multilayered built-up circuit substrate is manufactured by a semi-additive method and the like and produced by reciprocally layering conductor circuits of copper and the like and interlaminar resin insulating layers on a resin substrate reinforced with a 0.5 to 1.5 mm-thick glass cloth so-called a core. The interlaminar connection of the conductor circuits through the interlaminar resin insulating layers of the multilayered printed circuit board is performed by a via-hole.
Conventionally, the built-up multilayered printed circuit board has been manufactured by a method, for example, disclosed in Japanese H09-130050 A.
That is, at first, a through hole is formed in a copper-laminated laminate board bearing a copper foil and successively, the substrate is subjected to electroless copper plating treatment to form copper plating treatment to form a plated-through hole. Next, a conductor circuit is formed by etching the surface of the substrate in a conductor pattern and then the surface of the conductor circuit is roughened by electroless plating or etching and the like. Continuously, a resin insulating layer is formed on the conductor circuit having a roughened surface and then subjected to exposure and development treatment to form an opening part for a via-hole and after that, the interlaminar resin insulating layer is formed by UV curing and main curing.
Further, after the interlaminar resin insulating layer is subjected to roughening treatment by an acid or an oxidizing agent, a thin electroless plating film is formed and, then after a plating resist is formed on the electroless plating film, the thin electroless plating film is thickened by electroplating and after the plating resist is parted, etching is carried out to form a conductor circuit connected with a under-level conductor circuit through the via-hole.
After repeating these steps, finally a solder resist layer for protecting the conductor circuit is formed and the parts exposing the conductor circuit for connection with electronic parts, e.g. an IC chip, or a mother board and the like, are plated and then a solder bump is formed by printing a solder paste to complete the manufacture of a built-up multilayered printed circuit board.
A multilayered printed circuit board manufactured in such a manner is subjected to reflowing treatment after an IC chip is mounted thereon as to connect the solder bump to pads of the IC chip, and then, an under-fill (a resin layer) under the IC chip and a sealing layer of a resin or the like are formed on the IC chip to complete manufacture of a semiconductor device comprising the IC chip mounted thereon.
In the semiconductor device manufactured in such a manner, generally, a respective layer has different thermal expansion coefficients (linear expansion coefficients) attributed to the materials thereof. That is, the linear expansion coefficients of the IC chip, the under-fill and the interlaminar resin insulating layers are generally 20×10−6/K or lower, whereas the solder resist layer has the linear expansion coefficient as high as 60×10−6/K to 80×10−6/K because resins to be used are different and because of other reasons, and at highest, some have the linear expansion coefficient exceeding 100×10−6/K.
When a semiconductor device having such a constitution is operated, the IC chip radiates heat and the generated heat is transmitted through the under-fill to the solder resist layer, the interlaminar resin insulating layers and the like. Hence, these layers are thermally expanded owing to the temperature increase.
On this occasion, since the IC chip and the under-fill have very close linear expansion coefficients and since their degree of expansion owing to the temperature increase are very close, no significant stress which is attributed to the difference of their thermal expansion coefficients is generated. On the other hand, since the difference of the linear expansion coefficient between the under-fill or the interlaminar resin insulating layer and the solder resist layer sandwiched by those is large, the degrees of expansion owing to the temperature increase differ considerably. Hence, considerable stress is generated to the solder resist layer and, in some cases, cracks take place in the solder resist layer, or the solder resist layer is peeled from the under-fill or the interlaminar resin insulating layer.
Such cracking and peeling even take place with the heat at the time of forming the solder bump. Also, cracking occurs more easily in a heat cycle test and in a reliability test under a high temperature and a high humidity, in which the multilayered printed circuit board is tried in severe condition.
If cracks are once formed in the solder resist layer, the insulation between the conductor circuit under the solder resist layer and the solder bump cannot be retained, thus to result in a degradation of the high insulating property and the reliability.
Further, since a mixture of an epoxy resin, an acrylic resin and the like is used for the interlaminar resin insulating layer in a conventional multilayered printed circuit board manufactured by the above described method, the dielectric constant and the dielectric loss tangent are high in a GHz band and, in this case, if a LSI chip and the like using high frequency signals in the GHz band are mounted on this, signal delay and signal error sometimes occur attributed to the high dielectric constant of the interlaminar resin insulating layer.
Hence, in order to solve the above mentioned problems, proposed is a multilayered printed circuit board in which a polyolefin type resin, a polyphenylene ether resin, a fluororesin and the like having low dielectric constants are used for the interlaminar resin insulating layer.
In such a multilayered printed circuit board, the problem of generation of signal delay and signal error can be solved to some extent since most part of conductor circuits are formed in the interlaminar resin insulating layers.
However, as the frequency of the IC chip tends to be increased to a higher frequency, the density of the circuits in the IC chip is increased and the circuit pitches are narrowed, consequently, it is required to narrow the intervals of pads for outer terminals of a printed circuit board which is to be connected with the IC chip and also the number of the pad for the outer terminals per unit surface area is increased to lead to a high density thereof.
Therefore, if the dielectric constant and the dielectric loss tangent of a solder resist layer are high, it sometimes occurs a problem that signal delay and the like: in the bumps for the outer terminals of the solder resist layer; and in the inter-circuits are caused attributed to electromagnetic inter-reaction among circuits and the high dielectric property of the insulating layers existing in the surrounding of the circuits.
Further, even in the case that a multilayered printed circuit board for which a polyphenylene ether resin with a low dielectric loss tangent and a low dielectric constant and which does not induce easily the signal delay and signal error just as described above is used for the interlaminar resin insulating layers, such an effect is offset if the dielectric constant of a solder resist layer is high, therefore, signal delay and signal error sometimes take place.
Further, in a conventional manufacture of a multilayered printed circuit board, a solder resist layer is formed by using a paste-like fluid as a solder resist composition which is containing thermosetting resins such as a novolak type epoxy resin (meth)acrylate, an imidazole curing agent, a bifunctional (meth)acrylic acid ester monomer, a (meth)acrylic acid ester polymer with a molecular weight of 500 to 5000, thermosetting resin comprising a bisphenol type epoxy resin and the like, photosensitive monomers such as polyvalent acrylic monomers, and glycol ether type solvents and by applying and curing the fluid.
A multilayered printed circuit board comprising such a solder resist layer is to be used with electronic parts such as an IC chip being mounted thereon. Hence, the multilayered printed circuit board is desired to be durable even if the IC chip fires owing to a variety of causes. Practically, it is desired for the multilayered printed circuit board to clear the judgment standard of UL94 of a UL test standard and to clear especially the judgment standard of combustion time in 94V-0.
Further, while satisfying the above described flame retardancy, the multilayered printed circuit board is required to keep the openability of holes of the resin insulating layers or the solder resist layer without deterioration, as compared with those of an existing multilayered printed circuit board, at the time of forming an opening of a via-hole and an opening for a solder pad. It is moreover required to keep the adhesion strength between the resin insulating layers and the like and the conductor circuits without deterioration. Furthermore, the multilayered printed circuit board is required to keep its performance without deterioration at the time of a reliability test.
However, the multilayered printed circuit board comprising a solder resist layer formed by using a conventional solder resist composition has not been satisfactory in terms of flame retardancy.